There's many limiting factors... one is the reticle limit.
But most fundamental is the defect density on wafers. If you have, say, 10 defects per wafer, and you have 1000 chips on it: odds are you get 990 good chips.
If you have 10 chips on the wafer, you get 2-3 good chips per wafer.
Of course, there's yield maximization strategies, like being able to turn off portions of the die if it's defective (for certain kinds of defects).
For the upper limit, look at what Cerebras is doing with wafer scale. Then you get into related, crazy problems, like getting thousands of amperes into the circuit and cooling it.
But most fundamental is the defect density on wafers. If you have, say, 10 defects per wafer, and you have 1000 chips on it: odds are you get 990 good chips.
If you have 10 chips on the wafer, you get 2-3 good chips per wafer.
Of course, there's yield maximization strategies, like being able to turn off portions of the die if it's defective (for certain kinds of defects).
For the upper limit, look at what Cerebras is doing with wafer scale. Then you get into related, crazy problems, like getting thousands of amperes into the circuit and cooling it.